Keystone IP Core for FPGA


        In projection displays and automotive HUDs, geometric distortion caused by the optical axis, projection plane and optical system has long been a difficult engineering problem. Conventional optical compensation is constrained by mechanical adjustment range and installation space, limiting flexibility in complex projection scenarios. BergLogic's Keystone IP uses efficient digital image preprocessing to support keystone, pincushion, barrel and asymmetric warping.

        The core applies an inverse geometric transform that pre-warps a standard image into a target shape matched to the optical path, compensating for the projection system's geometric distortion. Within the supported correction range, this digital-first method restores a regular display geometry. The IP is suitable for ultra-short-throw projectors, multi-plane HUDs, simulators and immersive displays.

BergLogic Keystone correction result

Keystone correction result

        The Keystone IP combines a geometric-transform engine with interpolation. Keystone correction uses a homography matrix to map target-image coordinates to the source image, while pincushion, barrel and asymmetric warping generate the corresponding nonlinear mapping from configured parameters for sub-pixel geometric accuracy. Dynamic parameter updates take effect within 0.5 seconds, and two configurable interpolation modes are available:

BergLogic Keystone IP geometric-warp coordinate mapping

Keystone IP geometric-warp coordinate mapping

  • •   High-efficiency mode: bilinear interpolation over a 2×2 pixel matrix — optimal balance between compute resources and image quality
  • •   High-quality mode: bicubic interpolation over a 4×4 pixel neighborhood with a cubic convolution kernel — cinema-grade smooth transitions

Technical Highlights

The Keystone IP uses a fully hardware-accelerated architecture to combine flexible geometric warping with a compact FPGA footprint.

Fully Hardware-Based

No host software is required for parameter calculation or flow control, supporting processor-less FPGA architectures.

Flexible Configuration

When only Keystone correction is used, the four source- and target-image vertices are sufficient for configuration.

Compact Implementation

A streamlined pipeline minimizes logic-resource use and simplifies integration into existing video systems.

Multiple Warp Types

Supports keystone, pincushion, barrel and asymmetric warping up to 45°, with configurable 2×–4× scaling.

Fast Activation

Warp parameters can be updated at runtime, with new settings taking effect within 0.5 seconds.

Efficient Memory Management

A mature memory-management mechanism delivers exceptionally high memory utilization.

Technical Specifications
ItemSpecification
Configuration activationUnder 0.5 seconds
Performance versions4K at 60fps / 4K at 120fps
Warp typesKeystone, pincushion, barrel and asymmetric warping
Correction angleUp to 45°
Scaling rangeConfigurable from 2× to 4×
External memory4K at 60fps needs only 32-bit DDR4; 4K at 120fps needs only one 64-bit DDR4 group
Processing latencySelectable: 1 frame for small warps or 2 frames for large warps
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