Resource optimization
Lean implementations align algorithms with FPGA architecture to reduce logic and memory use and leave room for the wider system.
FPGA IP Cores
BergLogic provides video codecs, real-time IP transport, image processing and cryptographic acceleration IP for FPGA and SoC products, with configuration guidance, platform adaptation and custom integration support.
FPGA IP engineered for product integration
Our experience in FPGA implementation and image processing brings algorithm design, hardware architecture, resource optimization and verification together, helping customers integrate reliable IP into finished products.
Timing closure
Careful pipeline, critical-path and interface timing design balances throughput with implementation needs and simplifies timing optimization.
Tested and verified
Extensive testing and verification check function and interface behaviour to improve reliability and reduce integration debugging.
Integration and consulting
Integration support and technical consulting address platform interfaces, architecture, resource use, timing optimization and system debugging.
Find IP for your application
Choose functional modules and media transport subsystems for your product architecture.
Video codecs
Select compression for your image quality, bandwidth, latency and resource needs.
JPEG 2000
JPEG2000 IP
Lossy and lossless image compression, with standard and low-latency video versions for professional video, medical imaging, storage and distributed displays.
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JPEG XS
JPEG XS IP
Low-latency, visually lossless video coding with multiple profiles and performance configurations for Broadcast, ProAV, IPMX and high-resolution transport.
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VESA DSC
DSC IP
Visually lossless, low-latency display-stream compression based on VESA DSC 1.2b, compatible with DSC 1.1 and configurable for format, bit depth and throughput.
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PROPRIETARY CODEC
Huffman-diff IP
A proprietary BergLogic image codec combining differential processing and Huffman coding, suited to simple or large flat-colour images. Supports lossless compression and a visually lossless rate-control mode.
Explore productReal-time media transport
Connect compressed video and audio to IP networks.
ST 2110 IP Suite for JPEG XS
Real-time JPEG XS video and PCM audio transport for IPMX, with Sender, Receiver or combined configurations. The current version supports one 4K60 or four 1080p channels, with customizable performance.
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Video and image processing
Geometric correction, multi-source video processing and colour mapping.
GEOMETRY
Keystone IP
Geometric correction for trapezoidal, pincushion, barrel and asymmetric distortion, with dynamic parameters and interpolation options for projection, HUDs and immersive displays.
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VIDEO PROCESSING
VPSS IP
Crop, scale, window, overlay, add OSD and rotate video with modular processing for multi-source composition, video walls and distributed display systems.
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COLOUR
3D LUT IP
Real-time colour mapping with three-dimensional lookup tables and tetrahedral interpolation. Supports standard cube files and dynamic loading for cameras, monitors and professional video.
Explore productCryptographic acceleration
Configurable hardware for hashing, encryption and signature operations.
Find the right IP for your project
Share your application, target FPGA, throughput and interface requirements. We can help with IP configuration, platform adaptation and integration.
Contact us for detailed specifications, resource utilization and platform selection information.