On July 19, 2026, BergLogic participated in Pango Developer Conference 2026 in Shenzhen and showcased a JPEG XS encoding and decoding demo running on a Pango FPGA. A Pango partner, BergLogic specializes in FPGA audio/video IP and solutions.
The demo used a PG2T390H development board. A BergLogic video tester sent test video over HDMI, and the FPGA performed JPEG XS encoding followed by decoding. A splitter routed the output to a display and back to the tester, which overlaid real-time end-to-end latency and PSNR measurements.
JPEG XS is designed for real-time, visually lossless video transport, combining ultra-low latency, consistent image quality and low resource usage. BergLogic JPEG XS IP is compatible with the full Pango FPGA family, helping customers build low-latency, high-quality video systems.